
LVPECL Clock Driver, a 32-pin VFQFN EP surface mount component, features 2 differential inputs supporting HCSL, LVDS, LVHSTL, LVPECL, and SSTL logic levels, and 5 differential LVPECL outputs. Operating from 31.25 MHz to 700 MHz, this zero-delay buffer offers a maximum output frequency of 700 MHz with 25 ps maximum output skew and 25 ps maximum cycle-to-cycle jitter. The compact 5mm x 5mm x 0.95mm plastic package with a 0.5mm pin pitch is designed for efficient PCB integration.
Renesas 8634BK-01LF technical specifications.
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