Renesas
9112AG-16LF
PLL Based Clock Driver, 9112 Series, 5 True Output(s), 0 Inverted Output(s), PDSO8
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Technical Specifications
Renesas 9112AG-16LF technical specifications.
General
| Max Operating Temperature | 70 |
| Number of Terminals | 8 |
| Min Operating Temperature | 0 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G8 |
| Width | 3 |
| Length | 4.4 |
| Number of Functions | 1 |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Nom (Vsup) | 3.3 |
| Supply Voltage-Max (Vsup) | 3.6 |
| Supply Voltage-Min (Vsup) | 3 |
| Logic IC Type | PLL BASED CLOCK DRIVER |
| Family | 9112 |
| Max I(ol) | 0.025 |
| fmax-Min | 133 |
Compliance
| REACH | unknown |
| Military Spec | False |
Datasheet
Renesas 9112AG-16LF Datasheet
Download the complete datasheet for Renesas 9112AG-16LF to view detailed technical specifications.
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