High-performance clock buffer and driver featuring 4 differential HCSL outputs from a single differential input. Operates with input frequencies from 50 MHz to 110 MHz, producing outputs from 5 MHz to 166.66 MHz. Offers low jitter with a maximum cycle-to-cycle jitter of 50 ps and minimal output skew of 50 ps. Includes spread spectrum capability and supports a maximum duty cycle of 55%. Packaged in a 28-pin TSSOP.
Renesas 9DB433AGLFT technical specifications.
| Type | Clock Driver |
| Number of Inputs | 1 |
| Number of Outputs | 4 |
| Input Signal Type | Differential |
| Output Signal Type | Differential |
| Output Logic Level | HCSL |
| Minimum Input Frequency | 50MHz |
| Maximum Input Frequency | 110MHz |
| Minimum Output Frequency | 5MHz |
| Maximum Output Frequency | 166.66MHz |
| Maximum Cycle to Cycle Jitter | 50ps |
| Maximum Duty Cycle | 55% |
| Maximum Output Skew | 50ps |
| Spread Spectrum | Yes |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Pin Count | 28 |
| Package/Case | TSSOP |
| Package Family Name | SOP |
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
No datasheet is available for this part.
