9DBV0441AKLFT

Zero delay buffer clock driver featuring 4 differential outputs. This surface-mount component supports HCSL input logic and LP-HCSL output logic, operating with frequencies from 30 MHz to 137.5 MHz. The 32-pin VFQFPN EP package measures 5x5x0.95mm with a 0.5mm pin pitch. Key specifications include a maximum cycle-to-cycle jitter of 25 ps and maximum output skew of 50 ps.