8-output LP-HCSL differential clock driver featuring zero delay. This surface-mount integrated circuit operates within a 60 MHz to 171.875 MHz input frequency range, delivering output frequencies from 1 MHz to 200 MHz. The device offers a maximum cycle-to-cycle jitter of 25 ps and maximum output skew of 50 ps. Housed in a 48-pin VFQFPN EP package (6x6x0.95mm) with a 0.4mm pin pitch, it supports HCSL input logic levels.
Renesas 9DBV0841AKILFT technical specifications.
Download the complete datasheet for Renesas 9DBV0841AKILFT to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.