Dual positive edge-triggered J-KBAR flip-flop with complementary outputs. Features a maximum operating frequency of 25MHz and a propagation delay of 40ns at a nominal 5V supply. This logic IC is housed in a 16-pin PDIP package with through-hole mounting and a terminal pitch of 2.54mm. Operating temperature range is -20°C to 75°C, with a maximum supply current of 8mA.
Renesas HD74LS109AP technical specifications.
| Clock Edge Trigger Type | Positive Edge |
| fmax-Min | 25MHz |
| Height - Seated (Max) | 5.06mm |
| JESD-30 Code | R-PDIP-T16 |
| JESD-609 Code | e0 |
| Length | 19.2mm |
| Load Capacitance | 15pF |
| Logic IC Type | J-KBAR FLIP-FLOP |
| Max Frequency@Nom-Sup | 25MHz |
| Max I(ol) | 8A |
| Max Operating Temperature | 75°C |
| Min Operating Temperature | -20°C |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | Complementary |
| Package Body Material | Plastic |
| Package Code | DIP |
| Package Equivalence Code | DIP16,.3 |
| Package Shape | Rectangular |
| Package Style | IN-LINEMeter |
| Power Supplies | 5V |
| Power Supply Current-Max (ICC) | 8mA |
| Prop. Delay@Nom-Sup | 40ns |
| Propagation Delay (tpd) | 40ns |
| Qualification Status | Not Qualified |
| Reach SVHC Compliant | Yes |
| RoHS Compliant | No |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | No |
| Technology | TTL |
| Temperature Grade | COMMERCIAL EXTENDED |
| Terminal Finish | Tin |
| Terminal Form | Through Hole |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Width | 7.62mm |
| RoHS | Not Compliant |
No datasheet is available for this part.
