Dual negative edge-triggered J-K flip-flop with complementary outputs. This logic IC features 2 bits and operates with a nominal supply voltage of 5V, ranging from 4.75V to 5.25V. It boasts a maximum operating temperature of 75°C and a minimum of -20°C, with a propagation delay of 20ns. Packaged in a 16-pin plastic dual in-line package (PDIP), this component is designed for commercial extended temperature grades.
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Technical Specifications
Renesas HD74LS76AP technical specifications.
General
| Max Operating Temperature | 75 |
| Number of Terminals | 16 |
| Min Operating Temperature | -20 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDIP-T16 |
| Width | 7.62 |
| Length | 19.2 |
| Pin Count | 16 |
| Number of Functions | 2 |
| Temperature Grade | COMMERCIAL EXTENDED |
| Supply Voltage-Nom (Vsup) | 5 |
| Supply Voltage-Max (Vsup) | 5.25 |
| Supply Voltage-Min (Vsup) | 4.75 |
| Logic IC Type | J-K FLIP-FLOP |
| Family | LS |
| Propagation Delay (tpd) | 20 |
| Number of Bits | 2 |
| Max I(ol) | 0.008 |
| Prop. Delay@Nom-Sup | 20 |
| Load Capacitance | 15 |
| Output Polarity | COMPLEMENTARY |
| Power Supply Current-Max (ICC) | 6 |
| Trigger Type | NEGATIVE EDGE |
| fmax-Min | 30 |
Compliance
| RoHS | Yes |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
Datasheet
Renesas HD74LS76AP Datasheet
Download the complete datasheet for Renesas HD74LS76AP to view detailed technical specifications.
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