N-channel enhancement mode power MOSFET featuring 600V drain-source voltage and 20A continuous drain current. This single element transistor utilizes SJMOS process technology and is housed in a TO-247 package with 3 through-hole pins and a tab. Maximum power dissipation is 192.3W, with a typical gate charge of 27nC at 10V and input capacitance of 1600pF at 25V. Operating temperature range spans from -55°C to 150°C.
PackageTO-247
MountingThrough Hole
Quick Jump:
Technical Specifications
Renesas RJK60S5DPQ-E0#T2 technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | TO-247 |
| Package/Case | TO-247 |
| Package Description | Transistor Outline Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Tab | Tab |
| Package Length (mm) | 15.94 |
| Package Width (mm) | 5.02 |
| Package Height (mm) | 21.13 |
| Seated Plane Height (mm) | 25.96(max) |
| Pin Pitch (mm) | 5.45 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Configuration | Single Dual Drain |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | SJMOS |
| Maximum Drain Source Voltage | 600V |
| Maximum Gate Source Voltage | 30V |
| Maximum Continuous Drain Current | 20A |
| Maximum Drain Source Resistance | 178@10VmOhm |
| Typical Gate Charge @ Vgs | 27@10VnC |
| Typical Gate Charge @ 10V | 27nC |
| Typical Input Capacitance @ Vds | 1600@25VpF |
| Maximum Power Dissipation | 192300mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Renesas RJK60S5DPQ-E0#T2 Datasheet
Download the complete datasheet for Renesas RJK60S5DPQ-E0#T2 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.