CMOS FIFO memory IC with 5120 words x 8-bit organization, offering a maximum access time of 18ns and a cycle time of 25ns. This parallel interface component features a 40960-bit density and operates within a commercial temperature range of 0°C to 70°C. Supplied in a 24-lead SOP package with gull-wing terminals and a 1.27mm pitch, it supports a supply voltage range of 4.5V to 5.5V and is RoHS compliant.
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Technical Specifications
Renesas UPD485505G-25-E2-A technical specifications.
General
| Access Time-Max | 18ns |
| Cycle Time | 25ns |
| Density | 40960b |
| Height - Seated (Max) | 2.3mm |
| JESD-30 Code | R-PDSO-G24 |
| JESD-609 Code | e6 |
| Max Operating Temperature | 70°C |
| Memory Width | 8 |
| Min Operating Temperature | 0°C |
| Number of Functions | 1 |
| Number of Words | 5120 |
| Organization | 5KX8 |
| Output Enable | No |
| Package Body Material | Plastic |
| Package Code | SOP |
| Package Shape | Rectangular |
| Package Style | SMALL OUTLINEMeter |
| Parallel/Serial | PARALLEL |
| Qualification Status | Not Qualified |
| RoHS Compliant | Yes |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 4.5V |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | Tin |
| Terminal Form | Gull Wing |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Width | 8.4mm |
Compliance
| RoHS | Compliant |
Datasheet
Renesas UPD485505G-25-E2-A Datasheet
Download the complete datasheet for Renesas UPD485505G-25-E2-A to view detailed technical specifications.
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