UV PLD, 40ns, CMOS, CPGA68, WINDOWED, CERAMIC, PGA-68
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| Max Operating Temperature | 70 |
| Number of Terminals | 68 |
| Min Operating Temperature | 0 |
| Terminal Position | PERPENDICULAR |
| JEDEC Package Code | S-CPGA-P68 |
| Temperature Grade | COMMERCIAL |
| Supply Voltage-Nom | 5 |
| Supply Voltage-Min | 4.75 |
| Supply Voltage-Max | 5.25 |
| Clock Frequency-Max | 28.6 |
| Number of I/O Lines | 48 |
| HTS Code | 8542.39.00.01 |
| REACH | unknown |
| Military Spec | False |
