
Synchronous SRAM chip with 8M-bit density, organized as 512K words by 18 bits. Features a 6.5 ns maximum access time and operates at a maximum clock rate of 133.33 MHz with SDR data rate architecture. This dual-port memory component utilizes a 19-bit address bus and is housed in a 100-pin TQFP (Thin Quad Flat Package) with a 0.65 mm pin pitch, suitable for surface mounting. It operates from a 3.3 V supply voltage, with a minimum of 3.135 V and a maximum of 3.465 V, and functions within a temperature range of 0 °C to 70 °C.
Samsung K7M801825B-QC265 technical specifications.
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