TTL/H/L SERIES, 8-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PDIP14
TTL/H/L SERIES, 4-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16
TTL/H/L SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP BINARY COUNTER, PDIP14, DIP-14

Triple 3-input Positive-NAND gates with open collector outputs 14-PDIP 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops with Preset and Clear 16-PDIP 0 to 70