This 56-pin QFN EP clock generator features a non-lead-frame SMT package and operates over a temperature range of -0 to 85°C. It has a typical clock input frequency of 14.318MHz and supports input logic levels of crystal or LVTTL. The device is designed for surface mount applications and has a seated plane height of 1mm maximum. It is suitable for use in a variety of clock and timing applications.
PackageQFN EP
MountingSurface Mount
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Technical Specifications
Silicon Labs CY28551LFXC-3 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | QFN EP |
| Package Description | Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 56 |
| PCB | 56 |
| Package Length (mm) | 8.10(Max) |
| Package Width (mm) | 8.10(Max) |
| Package Height (mm) | 0.95(Max) |
| Seated Plane Height (mm) | 1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Number of Outputs per Chip | 20 |
| Input Logic Level | Crystal|LVTTL |
| Clock Input Frequency | 14.318(Typ)MHz |
| Min Operating Supply Voltage | 3.135V |
| Max Operating Supply Voltage | 3.465V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 6SQ24 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Silicon Labs CY28551LFXC-3 Datasheet
Download the complete datasheet for Silicon Labs CY28551LFXC-3 to view detailed technical specifications.
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