10-output differential clock driver featuring zero-delay buffering. This surface-mount integrated circuit operates with differential input and output signals, supporting frequencies from 60 MHz to 170 MHz. It offers a maximum cycle-to-cycle jitter of 100 ps and maximum output skew of 100 ps. The component is housed in a 48-pin Thin Shrink Small Outline Package (TSSOP) with gull-wing leads, measuring 12.6mm x 6.2mm x 1.1mm.
Silicon Labs CY2SSTV850ZC technical specifications.
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