
1Gbit DDR2 SDRAM memory chip, organized as 128Mx8, featuring an 8-bit data bus width and a maximum clock rate of 400 MHz. This surface-mount component utilizes a 60-pin Fine Pitch Ball Grid Array (FBGA) package with a 0.8mm pin pitch. Operating at a typical 1.8V supply voltage, it offers 8 internal banks and 16M words per bank. The FBGA package measures 11.4mm x 8mm x 0.76mm and operates within a temperature range of 0°C to 95°C.
SK Hynix H5PS1G83EFR-E3P technical specifications.
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