DDR2 SDRAM memory chip, 1Gbit density, organized as 128Mx8 with an 8-bit data bus. Features a 1066 MHz maximum clock rate and 8 internal banks. Packaged in a 60-pin FBGA (Fine Pitch Ball Grid Array) with a 0.8mm pin pitch, designed for surface mounting. Operates at a typical 1.8V supply voltage with a maximum access time of 0.35 ns.
SK Hynix H5PS1G83EFR-G7C technical specifications.
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