2Gbit DDR3 SDRAM memory chip, organized as 128Mx16, featuring a 16-bit data bus width and a maximum clock rate of 1866 MHz. This surface-mount component utilizes a 96-pin Fine Pitch Ball Grid Array (FBGA) package with a 0.8mm pin pitch and dimensions of 13mm x 9mm x 0.76mm. Operating at a typical supply voltage of 1.5V, it offers 8 internal banks with 16M words per bank and a maximum access time of 20 ns.
SK Hynix H5TQ2G63BFR-RDC technical specifications.
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