FPGA Development Kit featuring a 10M50DAF484C7G FPGA. Supports maximum clock frequencies of 10MHz, 24MHz, and 50MHz, with 64MB of RAM. Includes 1 USB port, 40 GPIO pins, and a VGA display interface supporting 7-segment/CRT displays. Development environment includes Nios II and Quartus II IDE, compatible with Windows XP. Features JTAG support, 10 LEDs, and 12 push buttons/switches for prototyping.
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Technical Specifications
Terasic P0466 technical specifications.
General
| Type | Development Kit |
| Supported Device | 10M50DAF484C7G |
| Supported Device Technology | FPGA |
| Maximum Clock Frequency | 10/24/50MHz |
| RAM Size | 64MB |
| USB | 1 |
| GPIO | 40 |
| Display Interface | VGA |
| Display Type | 7-segment/CRT |
| IDE | Nios II/Quartus II |
| Windows | Win XP |
| Operating Systems | Win XP |
| JTAG Support | Yes |
| Number of LEDs | 10 |
| Push Buttons and Switches | 12 |
Datasheet
Terasic P0466 Datasheet
Download the complete datasheet for Terasic P0466 to view detailed technical specifications.
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