Dual JK Master-Slave Flip-Flop IC, featuring two independent JK flip-flop elements, each with two inputs and one output. This CMOS logic device utilizes positive-edge triggering and offers both inverting and non-inverting polarity. Packaged in a 16-pin Ceramic Dual In Line Package (CDIP) with through-hole mounting, it operates across a temperature range of -55°C to 125°C.
PackageCDIP
MountingThrough Hole
PolarityInverting/Non-Inverting
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Technical Specifications
Texas Instruments CD4027BF technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | DIP |
| Package/Case | CDIP |
| Package Description | Ceramic Dual In Line Package |
| Lead Shape | Through Hole |
| Pin Count | 16 |
| PCB | 16 |
| Package Length (mm) | 21.34(Max) |
| Package Width (mm) | 7.62(Max) |
| Package Height (mm) | 3.56(Max) |
| Seated Plane Height (mm) | 5.08(Max) |
| Pin Pitch (mm) | 2.54 |
| Package Material | Ceramic |
| Mounting | Through Hole |
| Jedec | MS-030AC |
| Logic Family | CD4000 |
| Logic Function | JK-Master-Slave Type |
| Process Technology | CMOS |
| Number of Elements per Chip | 2 |
| Number of Element Inputs | 2 |
| Number of Element Outputs | 1 |
| Polarity | Inverting/Non-Inverting |
| Triggering Type | Positive-Edge |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 125°C |
Compliance
| Cage Code | 01295 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Texas Instruments CD4027BF Datasheet
Download the complete datasheet for Texas Instruments CD4027BF to view detailed technical specifications.
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