Dual negative-edge-triggered J-K flip-flops with set and reset functionality. This CMOS logic device operates with a maximum frequency of 60MHz and features a propagation delay of 270ns. Designed for surface mount, it is housed in a 16-TSSOP package with gold contact plating. The component supports a supply voltage range of 2V to 6V and offers an output current of 5.2mA. Operating temperature spans from -55°C to 125°C, with RoHS compliance.
Frequency60MHz
PackageTSSOP
MountingSurface Mount
PolarityNon-Inverting
Quick Jump:
Technical Specifications
Texas Instruments CD74HC112PW technical specifications.
General
Package/Case
TSSOP
Clock Edge Trigger Type
Negative Edge
Contact Plating
Gold
Frequency
60MHz
Height
1.05mm
High Level Output Current
-5.2mA
Input Capacitance
10pF
Input Type
SINGLE-ENDED
Lead Free
Lead Free
Length
5.1mm
Logic Function
Flip-Flop, JK-Type
Low Level Output Current
5.2mA
Max Operating Temperature
125°C
Min Operating Temperature
-55°C
Max Supply Voltage
6V
Min Supply Voltage
2V
Mount
Surface Mount
Number of Bits
2
Number of Bits per Element
1
Number of Circuits
2
Number of Elements
2
Number of Input Lines
2
Number of Output Lines
1
Output Current
5.2mA
Packaging
Rail/Tube
Polarity
Non-Inverting
Propagation Delay
270ns
Quiescent Current
4uA
Reach SVHC Compliant
No
RoHS Compliant
Yes
Series
74HC
Technology
CMOS
Turn-On Delay Time
14ns
Weight
0.002183oz
Width
4.5mm
Compliance
RoHS
Compliant
Datasheet
Texas Instruments CD74HC112PW Datasheet
Download the complete datasheet for Texas Instruments CD74HC112PW to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.
Product Images
