32-bit ARM Cortex M3 RISC microcontroller featuring a 25 MHz clock rate and 16KB Flash program memory. This surface-mount device offers 4KB RAM, 36 programmable I/Os, and 5 timers. It supports I2C, I2S, SPI, and UART interfaces. Packaged in a 48-pin VQFN EP with a 0.5mm pin pitch, operating from 3.3V and within a -40°C to 85°C temperature range.
PackageVQFN EP
MountingSurface Mount
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Technical Specifications
Texas Instruments LM3S300-IGZ25-C2 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | VQFN EP |
| Package Description | Very Thin Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 48 |
| PCB | 48 |
| Package Length (mm) | 7.15(Max) |
| Package Width (mm) | 7.15(Max) |
| Package Height (mm) | 0.95(Max) |
| Seated Plane Height (mm) | 1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-220 |
| Family Name | Stellaris |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 25MHz |
| Maximum CPU Frequency | 25MHz |
| Device Core | ARM Cortex M3 |
| Program Memory Type | Flash |
| Program Memory Size | 16KB |
| RAM Size | 4KB |
| Number of Programmable I/Os | 36 |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 5 |
| Interface Type | I2C/I2S/SPI/UART |
| CAN | 0 |
| I2C | 1 |
| SPI | 1 |
| Ethernet | 0 |
| UART | 2 |
| USART | 0 |
| USB | 0 |
| I2S | 1 |
| Max Operating Supply Voltage | 3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 01295 |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Texas Instruments LM3S300-IGZ25-C2 Datasheet
Download the complete datasheet for Texas Instruments LM3S300-IGZ25-C2 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.