Texas Instruments
SN54S112J
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CDIP -55 to 125
Frequency125MHz
PackageCDIP
MountingThrough Hole
PolarityNon-Inverting
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Technical Specifications
Texas Instruments SN54S112J technical specifications.
General
| Package/Case | CDIP |
| Clock Edge Trigger Type | Negative Edge |
| Frequency | 125MHz |
| High Level Output Current | -1mA |
| Lead Free | Contains Lead |
| Logic Function | JK-Type |
| Low Level Output Current | 20mA |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Through Hole |
| Number of Bits | 2 |
| Number of Elements | 2 |
| Operating Supply Voltage | 5V |
| Packaging | Rail/Tube |
| Polarity | Non-Inverting |
| Propagation Delay | 7ns |
| RoHS Compliant | No |
| Technology | BIPOLAR |
Compliance
| RoHS | Not Compliant |
Datasheet
Texas Instruments SN54S112J Datasheet
Download the complete datasheet for Texas Instruments SN54S112J to view detailed technical specifications.
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