Dual negative edge-triggered J-K flip-flop with complementary outputs. Features a 130MHz maximum operating frequency and 6.5ns propagation delay. Operates from a 4.5V to 5.5V supply voltage, with a typical 5V operating voltage. Offers 20mA low-level output current and -1mA high-level output current. Surface mountable in a 16-pin SOIC package.
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Texas Instruments SN74F112DG4 technical specifications.
| Package/Case | SOIC |
| Clock Edge Trigger Type | Negative Edge |
| Frequency | 130MHz |
| High Level Output Current | -1mA |
| Lead Free | Contains Lead |
| Logic Function | JK-Type |
| Low Level Output Current | 20mA |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Surface Mount |
| Number of Bits | 2 |
| Number of Bits per Element | 1 |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Operating Supply Voltage | 5V |
| Output Current | 20mA |
| Output Type | TTL |
| Package Quantity | 40 |
| Packaging | Rail/Tube |
| Polarity | Non-Inverting |
| Propagation Delay | 6.5ns |
| Radiation Hardening | No |
| RoHS Compliant | Yes |
| Series | 74F |
| Technology | BIPOLAR |
| Turn-On Delay Time | 4.6ns |
| Weight | 0.004998oz |
| RoHS | Compliant |
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