32-bit fixed-point digital signal processor (DSP) operating at 1.2GHz, delivering 9600 MIPS. Features a 561-pin Flip Chip Ball Grid Array (FCBGA) package with a 0.8mm pin pitch, designed for surface mounting. Includes 64KB of ROM program memory and a VLIW instruction set architecture. Supports I2C interface and operates within a temperature range of 0°C to 95°C.
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Texas Instruments TMS320C6474FZUN2 technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FCBGA |
| Package Description | Flip Chip Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 561 |
| PCB | 561 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 2.65 |
| Seated Plane Height (mm) | 3.3(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | TMS320 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | VLIW |
| Numeric and Arithmetic Format | Fixed-Point |
| Device Core | C64x |
| Program Memory Type | ROM |
| Program Memory Size | 64KB |
| Maximum Speed | 1200MHz |
| Number of Programmable I/Os | 16 |
| Device Million Instructions per Second | 9600MIPS |
| Device Input Clock Speed | 1200MHz |
| Typical Operating Supply Voltage | 1.1|1.8V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 95°C |
| Interface Type | I2C |
| I2C | 1 |
| CAN | 0 |
| UART | 0 |
| Ethernet | 0 |
| USART | 0 |
| USB | 0 |
| SPI | 0 |
| I2S | 0 |
| Programmability | Yes |
| Cage Code | 01295 |
| EU RoHS | Yes with Exemption |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| ECCN | 3A991.a.2 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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