P-channel enhancement mode power MOSFET featuring a 60V drain-source voltage and 20A continuous drain current. This single-element silicon transistor utilizes pi-MOS V process technology and is housed in a TO-220FL package with 3 pins and a tab, suitable for through-hole mounting. Key specifications include a maximum gate-source voltage of ±20V, a maximum drain-source on-resistance of 45mΩ at 10V, and a maximum power dissipation of 100W. Operating temperature range is -55°C to 150°C.
PackageTO-220FL
MountingThrough Hole
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Technical Specifications
Toshiba 2SJ401(T4LASAW) technical specifications.
General
| Package Family Name | TO-220 |
| Package/Case | TO-220FL |
| Pin Count | 3 |
| PCB | 3 |
| Tab | Tab |
| Package Length (mm) | 10.3(Max) |
| Package Width (mm) | 4.7(Max) |
| Package Height (mm) | 9.1 |
| Seated Plane Height (mm) | 13.1(Max) |
| Package Weight (g) | 1.5 |
| Mounting | Through Hole |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | P |
| Number of Elements per Chip | 1 |
| Process Technology | pi-MOS V |
| Maximum Drain Source Voltage | 60V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 20A |
| Material | Si |
| Maximum Gate Threshold Voltage | 2V |
| Maximum Drain Source Resistance | 45@10VmOhm |
| Typical Gate Charge @ Vgs | 90@10VnC |
| Typical Gate Charge @ 10V | 90nC |
| Typical Input Capacitance @ Vds | 2800@10VpF |
| Maximum Power Dissipation | 100000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | S0562 |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Datasheet
Toshiba 2SJ401(T4LASAW) Datasheet
Download the complete datasheet for Toshiba 2SJ401(T4LASAW) to view detailed technical specifications.
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