N-channel enhancement mode power MOSFET featuring 500V drain-source voltage and 15A continuous drain current. This single-element transistor utilizes pi-MOS V process technology and is housed in a TO-3PN package with 3 pins and a tab, designed for through-hole mounting. Key specifications include a maximum drain-source on-resistance of 400 mOhm at 10V, typical gate charge of 58 nC at 10V, and typical input capacitance of 2600 pF at 10V. Operating temperature range is -55°C to 150°C, with a maximum power dissipation of 150W.
PackageTO-3PN
MountingThrough Hole
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Technical Specifications
Toshiba 2SK2698(SCMDNSI3PP technical specifications.
General
| Package Family Name | TO-3PN |
| Package/Case | TO-3PN |
| Package Description | Transistor Outline Package |
| Pin Count | 3 |
| PCB | 3 |
| Tab | Tab |
| Package Length (mm) | 15.9(Max) |
| Package Width (mm) | 4.5 |
| Package Height (mm) | 19 |
| Seated Plane Height (mm) | 23.6(Max) |
| Pin Pitch (mm) | 5.45 |
| Mounting | Through Hole |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | pi-MOS V |
| Maximum Drain Source Voltage | 500V |
| Maximum Gate Source Voltage | ±30V |
| Maximum Continuous Drain Current | 15A |
| Material | Si |
| Maximum Drain Source Resistance | 400@10VmOhm |
| Typical Gate Charge @ Vgs | 58@10VnC |
| Typical Gate Charge @ 10V | 58nC |
| Typical Input Capacitance @ Vds | 2600@10VpF |
| Maximum Power Dissipation | 150000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | S0562 |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Datasheet
Toshiba 2SK2698(SCMDNSI3PP Datasheet
Download the complete datasheet for Toshiba 2SK2698(SCMDNSI3PP to view detailed technical specifications.
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