20-pin PDIP transparent D-type latch with 8 non-inverting inputs and 8 3-state outputs. This CMOS logic IC features a transparent latch mode and is designed for through-hole mounting with a 2.54mm pin pitch. Operating across a temperature range of -40°C to 85°C, it utilizes ACT logic family technology.
Sign in to ask questions about the Toshiba TC74ACT373P(F) datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
Toshiba TC74ACT373P(F) technical specifications.
| Basic Package Type | Through Hole |
| Package Family Name | DIP |
| Package/Case | PDIP |
| Package Description | Plastic Dual In Line Package |
| Lead Shape | Through Hole |
| Pin Count | 20 |
| PCB | 20 |
| Package Length (mm) | 25.1(Max) |
| Package Width (mm) | 6.4 |
| Package Height (mm) | 3.5 |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | MS-001AD |
| Logic Family | ACT |
| Process Technology | CMOS |
| Latch Mode | Transparent |
| Type | D-Type |
| Number of Elements per Chip | 1 |
| Number of Inputs per Chip | 8 |
| Number of Outputs per Chip | 8 |
| Output Type | 3-State |
| Polarity | Non-Inverting |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| Cage Code | S0562 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Download the complete datasheet for Toshiba TC74ACT373P(F) to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.
