CMOS 2-input NAND gate IC featuring four independent elements. This integrated circuit offers a 14-pin Plastic Dual In-line Package (PDIP) for through-hole mounting. Operating within a temperature range of -40°C to 85°C, it utilizes HC logic family technology. The PDIP package measures 19.75mm (max) in length, 6.4mm in width, and 3.5mm in height with a 2.54mm pin pitch.
PackagePDIP
MountingThrough Hole
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Technical Specifications
Toshiba TC74HC00AP(P,F) technical specifications.
General
Basic Package Type
Through Hole
Package Family Name
DIP
Package/Case
PDIP
Package Description
Plastic Dual In Line Package
Lead Shape
Through Hole
Pin Count
14
PCB
14
Package Length (mm)
19.75(Max)
Package Width (mm)
6.4
Package Height (mm)
3.5
Seated Plane Height (mm)
4.15
Pin Pitch (mm)
2.54
Package Weight (g)
0.96
Package Material
Plastic
Mounting
Through Hole
Jedec
MS-001AA
Logic Family
HC
Logic Function
NAND
Process Technology
CMOS
Number of Elements per Chip
4
Number of Element Inputs
2-IN
Number of Element Outputs
1
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Compliance
Cage Code
S0562
EU RoHS
Yes
HTS Code
8542390001
Schedule B
8542390000
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2002/95/EC
Datasheet
Toshiba TC74HC00AP(P,F) Datasheet
Download the complete datasheet for Toshiba TC74HC00AP(P,F) to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.