NPN Darlington transistor array featuring four elements per chip, designed for through-hole mounting in a 16-pin PDIP package. Delivers a maximum collector-emitter voltage of 50V and a continuous DC collector current of 1.5A, with a maximum power dissipation of 2700mW. Offers a typical DC current gain of 800 at 1A/2V and 1500 at 0.25A/2V, with a maximum collector-emitter saturation voltage of 1.6V. Operates within a temperature range of -40°C to 85°C.
PackagePDIP
MountingThrough Hole
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Technical Specifications
Toshiba TD62064AP(F,J,S) technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | DIP |
| Package/Case | PDIP |
| Package Description | Plastic Dual In Line Package |
| Lead Shape | Through Hole |
| Pin Count | 16 |
| PCB | 16 |
| Package Length (mm) | 19.75(Max) |
| Package Width (mm) | 6.4 |
| Package Height (mm) | 3.5 |
| Seated Plane Height (mm) | 4.15 |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | MS-001BB |
| Type | NPN |
| Configuration | Quad |
| Number of Elements per Chip | 4 |
| Maximum Collector-Emitter Voltage | 50V |
| Maximum Continuous DC Collector Current | 1.5A |
| Maximum Power Dissipation | 2700mW |
| Maximum Collector-Emitter Saturation Voltage | 1.6@[email protected]|1.25@[email protected]V |
| Minimum DC Current Gain | 800(Typ)@1A@2V|1500(Typ)@0.25A@2V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | S0562 |
| EU RoHS | Yes |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Toshiba TD62064AP(F,J,S) Datasheet
Download the complete datasheet for Toshiba TD62064AP(F,J,S) to view detailed technical specifications.
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