
NPN Darlington transistor array featuring a 25V collector-emitter voltage and 0.5A continuous collector current. This 16-pin PDIP package offers 7 elements per chip with a 1000 minimum DC current gain. Designed for through-hole mounting, it operates within a -30°C to 75°C temperature range and has a maximum power dissipation of 1000mW.
Checking distributor stock and pricing after the page loads.
Sign in to ask questions about the Toshiba TD62104P(J) datasheet using AI. Get instant answers about specifications, features, and technical details, ideal for finding information in larger documents.
Sign In to ChatWidest selection of semiconductors and electronic components in stock and ready to ship ™
Toshiba TD62104P(J) technical specifications.
| Basic Package Type | Through Hole |
| Package Family Name | DIP |
| Package/Case | PDIP |
| Package Description | Plastic Dual In Line Package |
| Lead Shape | Through Hole |
| Pin Count | 16 |
| PCB | 16 |
| Package Length (mm) | 19.75(Max) |
| Package Width (mm) | 6.4 |
| Package Height (mm) | 3.5 |
| Seated Plane Height (mm) | 4.15 |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | MS-001BB |
| Type | NPN |
| Configuration | Array 7 |
| Number of Elements per Chip | 7 |
| Maximum Collector-Emitter Voltage | 25V |
| Maximum Continuous DC Collector Current | 0.5A |
| Maximum Power Dissipation | 1000mW |
| Minimum DC Current Gain | 1000@350mA@2V |
| Min Operating Temperature | -30°C |
| Max Operating Temperature | 75°C |
| Cage Code | S0562 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Download the complete datasheet for Toshiba TD62104P(J) to view detailed technical specifications.
The embedded preview will load automatically when this section scrolls into view.