Field Programmable Gate Array (FPGA) featuring 1472 Configurable Logic Blocks (CLBs) and an estimated 700,000 system gates. Achieves a maximum clock frequency of 667MHz with 13248 logic cells. CMOS technology in a 256-pin PBGA package (17x17mm, 1.55mm height, 1mm pitch). Operates within a temperature range of 0°C to 85°C with a nominal supply voltage of 1.2V (1.14V to 1.26V). Includes 161 inputs and 148 outputs.
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| Max Operating Temperature | 85 |
| Number of Terminals | 256 |
| Min Operating Temperature | 0 |
| Terminal Position | BOTTOM |
| JEDEC Package Code | S-PBGA-B256 |
| Width | 17 |
| Length | 17 |
| Pin Count | 256 |
| Temperature Grade | OTHER |
| Supply Voltage-Nom | 1.2 |
| Supply Voltage-Min | 1.14 |
| Supply Voltage-Max | 1.26 |
| Number of Outputs | 148 |
| Clock Frequency-Max | 667 |
| Number of Inputs | 161 |
| RoHS | Yes |
| Eccn Code | EAR99 |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
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