Field Programmable Gate Array (FPGA) with 101,261 logic cells and 126,576 registers, built on 45nm process technology. Features 4,824 Kbit RAM, 360 18x18 multipliers, and 180 dedicated DSP slices. Offers 326 maximum user I/Os and 18 DLLs/PLLs. Operates with a transceiver speed of 3.2 Gbps and is housed in a 484-pin, 23mm x 23mm x 1.7mm Fine Pitch Ball Grid Array (FBGA) package for surface mounting. Extended temperature range from -40°C to 100°C.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX100-2FGG484I technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 326 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 180 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX100-2FGG484I Datasheet
Download the complete datasheet for Xilinx XC6SLX100-2FGG484I to view detailed technical specifications.
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