Field Programmable Gate Array (FPGA) with 101,261 logic cells and 126,576 registers, built on 45nm process technology. Features 4824 Kbit RAM bits, 360 (18x18) multipliers, and 180 dedicated DSP blocks. Offers 102 maximum user I/Os and 18 DLLs/PLLs. Packaged in a 144-pin TQFP (Thin Quad Flat Package) with a 0.5mm pin pitch, suitable for surface mounting. Operates within a temperature range of 0°C to 85°C.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX100-2TQG144C technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP |
| Package Description | Thin Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 20 |
| Package Width (mm) | 20 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BFB |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 102 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX100-2TQG144C Datasheet
Download the complete datasheet for Xilinx XC6SLX100-2TQG144C to view detailed technical specifications.
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