Field Programmable Gate Array (FPGA) with 101,261 logic cells and 126,576 registers, built on 45nm process technology. Features 480 maximum user I/Os, 4.824 Mbit of RAM, and 360 18x18 multipliers. This surface-mount device utilizes a 676-pin Fine Pitch Ball Grid Array (FBGA) package measuring 27x27mm with a 1mm pin pitch. Operates from 0°C to 85°C, offering 3.2 Gbps transceiver speed and 180 dedicated DSP blocks.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX100-3FGG676C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 676 |
| PCB | 676 |
| Package Length (mm) | 27 |
| Package Width (mm) | 27 |
| Package Height (mm) | 1.73 |
| Seated Plane Height (mm) | 2.23 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAL-1 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 480 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX100-3FGG676C Datasheet
Download the complete datasheet for Xilinx XC6SLX100-3FGG676C to view detailed technical specifications.
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