Field Programmable Gate Array (FPGA) featuring 101,261 logic cells and 126,576 registers, built on 45nm process technology. This device offers 4.824 Mbit of RAM, 360 integrated 18x18 multipliers, and 180 dedicated DSP slices. It includes 8 transceiver blocks operating at up to 3.2 Gbps, a PCI block, and 18 DLLs/PLLs. The FPGA is housed in a 256-pin Fine Pitch Thin Ball Grid Array (FTBGA) package, measuring 17x17x1 mm, designed for surface mounting. It supports a maximum of 186 user I/Os and operates within a temperature range of -40°C to 100°C.
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Xilinx XC6SLX100T-3FT256I technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FTBGA |
| Package Description | Fine Pitch Thin Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | Spartan®-6 LXT |
| Maximum Number of User I/Os | 186 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Blocks | 8 |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 180 |
| PCI Blocks | 1 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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