Field Programmable Gate Array (FPGA) with 147,443 logic cells and 184,304 registers. Features 4824 Kbit RAM, 360 18x18 multipliers, and 180 dedicated DSP blocks. Operates on 1.2V with 45nm process technology, offering 232 maximum user I/Os and 3.2 Gbps transceiver speed. Housed in a 324-pin Chip Scale Ball Grid Array (CSBGA) package, measuring 15x15x0.9mm with 0.8mm pin pitch, suitable for surface mounting. SRAM programmable with 18 DLLs/PLLs and 268 Block RAMs, operating from 0°C to 85°C.
PackageCSBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX150-3CSG324C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 324 |
| PCB | 324 |
| Package Length (mm) | 15 |
| Package Width (mm) | 15 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.5(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 232 |
| Number of Registers | 184304 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 147443 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX150-3CSG324C Datasheet
Download the complete datasheet for Xilinx XC6SLX150-3CSG324C to view detailed technical specifications.
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