Field Programmable Gate Array (FPGA) with 147,443 logic cells and 184,304 registers. Features 4.824 Mbit of RAM, 360 18x18 multipliers, and 180 dedicated DSP blocks. Operates on 45nm process technology with a transceiver speed of 3.2 Gbps. Housed in a 256-pin Fine Pitch Thin Ball Grid Array (FTBGA) package, measuring 17mm x 17mm x 1mm, for surface mounting. Offers 18 DLLs/PLLs and 268 total Block RAMs.
PackageFTBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX150-L1FT256C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FTBGA |
| Package Description | Fine Pitch Thin Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 256 |
| PCB | 256 |
| Package Length (mm) | 17 |
| Package Width (mm) | 17 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.4 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-034AAF-1 |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 186 |
| Number of Registers | 184304 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 147443 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 1L |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
Compliance
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX150-L1FT256C Datasheet
Download the complete datasheet for Xilinx XC6SLX150-L1FT256C to view detailed technical specifications.
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