
Field Programmable Gate Array (FPGA) with 24,051 logic cells and 30,064 registers, built on 45nm process technology. Features 936 Kbit of RAM, 52 Block RAMs, and 38 dedicated DSP slices, supporting up to 266 user I/Os. Operates at 1.2V with a transceiver speed of 3.2 Gbps, housed in a 484-pin, 23mm x 23mm x 1.7mm Fine Pitch Ball Grid Array (FBGA) package for surface mounting. Includes 6 DLLs/PLLs and 76 18x18 multipliers, with an operating temperature range of 0°C to 85°C.
Xilinx XC6SLX25-2FG484C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 266 |
| Number of Registers | 30064 |
| RAM Bits | 936Kbit |
| Device Logic Cells | 24051 |
| Process Technology | 45nm |
| Number of Multipliers | 76 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 38 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 52 |
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX25-2FG484C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.