Field Programmable Gate Array (FPGA) with 24,051 logic cells and 30,064 registers, built on 45nm process technology. Features 936 Kbit RAM, 76 18x18 multipliers, and 38 dedicated DSP blocks. Includes 2 transceiver blocks operating at 3.2 Gbps and 1 PCI block. Packaged in a 484-pin Fine Pitch Ball Grid Array (FBGA) for surface mounting, with a pin pitch of 1mm. Operates across a temperature range of -40°C to 100°C.
PackageFBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX25T-2FGG484I technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LXT |
| Maximum Number of User I/Os | 250 |
| Number of Registers | 30064 |
| RAM Bits | 936Kbit |
| Device Logic Cells | 24051 |
| Process Technology | 45nm |
| Number of Multipliers | 76 (18x18) |
| Programmability | Yes |
| Transceiver Blocks | 2 |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 38 |
| PCI Blocks | 1 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 52 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX25T-2FGG484I Datasheet
Download the complete datasheet for Xilinx XC6SLX25T-2FGG484I to view detailed technical specifications.
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