Field Programmable Gate Array (FPGA) with 3840 logic cells and 45nm process technology. Features 144 pins in a TQFP EP package with a 0.5mm pin pitch, designed for surface mounting. Offers 102 user I/Os, 4800 registers, 216 Kbit RAM, and 16 integrated 18x18 multipliers. Supports external memory interfaces including DDR, DDR2, DDR3, and LPDDR SDRAM, with 12 Block RAMs and 6 DLLs/PLLs. Operates within a temperature range of 0°C to 85°C.
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Xilinx XC6SLX4-2TQG144C technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP EP |
| Package Description | Thin Quad Flat Package, Exposed Pad |
| Lead Shape | Gull-wing |
| Pin Count | 144 |
| PCB | 144 |
| Package Length (mm) | 20 |
| Package Width (mm) | 20 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Package Orientation | Yes |
| Package Orientation Marking Type | Dot |
| Jedec | MS-026BFB |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 102 |
| Number of Registers | 4800 |
| RAM Bits | 216Kbit |
| Device Logic Cells | 3840 |
| Process Technology | 45nm |
| Number of Multipliers | 16 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 8 |
| Speed Grade | 2 |
| External Memory Interface | DDR SDRAM|DDR2 SDRAM|DDR3 SDRAM|LPDDR SDRAM |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 12 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
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