Field Programmable Gate Array (FPGA) with 74,637 logic cells and 93,296 registers, built on 45nm process technology. Features 3,096 Kbit RAM, 132 dedicated DSP slices, and 172 block RAMs. Offers 280 maximum user I/Os and 18 DLLs/PLLs. Operates at 1.2V with a transceiver speed of 3.2 Gbps. Packaged in a 484-pin Fine Pitch Ball Grid Array (FBGA) for surface mounting, with dimensions of 23mm x 23mm x 1.7mm and a 1mm pin pitch.
PackageFBGA
MountingSurface Mount
Quick Jump:
Technical Specifications
Xilinx XC6SLX75-3FG484C technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 280 |
| Number of Registers | 93296 |
| RAM Bits | 3096Kbit |
| Device Logic Cells | 74637 |
| Process Technology | 45nm |
| Number of Multipliers | 264 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 132 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 172 |
Compliance
| Cage Code | 68994 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX75-3FG484C Datasheet
Download the complete datasheet for Xilinx XC6SLX75-3FG484C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.