Field Programmable Gate Array (FPGA) with 9152 logic cells and 11440 registers, featuring 576 Kbit RAM and 32 dedicated 18x18 multipliers. This device utilizes 45nm process technology and offers 160 maximum user I/Os. It operates with a 1.2V core voltage and supports transceiver speeds up to 3.2 Gbps. The FPGA is housed in a 225-pin Chip Scale Ball Grid Array (CSBGA) package with a 0.8mm pin pitch, designed for surface mounting and operating within a -40°C to 100°C temperature range.
PackageCSBGA
MountingSurface Mount
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Technical Specifications
Xilinx XC6SLX9-2CSG225I technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | CSBGA |
| Package Description | Chip Scale Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 225 |
| PCB | 225 |
| Package Length (mm) | 13 |
| Package Width (mm) | 13 |
| Package Height (mm) | 0.9 |
| Seated Plane Height (mm) | 1.4(Max) |
| Pin Pitch (mm) | 0.8 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 160 |
| Number of Registers | 11440 |
| RAM Bits | 576Kbit |
| Device Logic Cells | 9152 |
| Process Technology | 45nm |
| Number of Multipliers | 32 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 100°C |
| Dedicated DSP | 16 |
| Speed Grade | 2 |
| Device Number of DLLs/PLLs | 6 |
| Total Number of Block RAM | 32 |
Compliance
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Xilinx XC6SLX9-2CSG225I Datasheet
Download the complete datasheet for Xilinx XC6SLX9-2CSG225I to view detailed technical specifications.
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