Field Programmable Gate Array (FPGA) featuring 4075 Configurable Logic Blocks (CLBs) and 52160 cells, operating at a maximum clock frequency of 1098MHz. This CMOS device utilizes a 236-pin PBGA package with terminals positioned at the bottom. It supports a nominal supply voltage of 1V, with a range from 0.95V to 1.05V, and offers 106 inputs and 106 outputs. The JEDEC package code is S-PBGA-B236, with a package width and length of 10.
Xilinx XC7A50T-1CPG236I technical specifications.
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