Field Programmable Gate Array (FPGA) featuring 12675 CLBs and 162240 logic cells. Operates at a maximum clock frequency of 1286MHz with a nominal supply voltage of 1V (0.97V to 1.03V). This CMOS device is housed in a 676-terminal PBGA package with a JEDEC code of S-PBGA-B676, measuring 27x27mm. It offers 400 inputs and 400 outputs.
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| Number of Terminals | 676 |
| Terminal Position | BOTTOM |
| JEDEC Package Code | S-PBGA-B676 |
| Width | 27 |
| Length | 27 |
| Pin Count | 676 |
| Supply Voltage-Nom | 1 |
| Supply Voltage-Min | 0.97 |
| Supply Voltage-Max | 1.03 |
| Number of Outputs | 400 |
| Clock Frequency-Max | 1286 |
| Number of Inputs | 400 |
| RoHS | Yes |
| Eccn Code | 3A991.D |
| Lead Free | Yes |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
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