
Programmable Logic Device (PLD) featuring 64 macrocells and a maximum clock frequency of 95 MHz. This CMOS device operates within a commercial temperature range of 0°C to 70°C, with a nominal supply voltage of 3.3V (3V to 3.6V range). It offers 68 I/O lines and is housed in a 100-terminal, lead-free PQFP package with a 10ns propagation delay.
Xilinx XCR3064XL-10VQG100C technical specifications.
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