The 18-bit charge-redistribution SAR analog-to-digital converter samples fully differential inputs at up to 1.25 MSPS from a single 2.5 V supply. It integrates an internal conversion clock, 2.048 V reference and buffer, error-correction circuitry, and serial and parallel digital interface ports. The converter provides no pipeline latency and supports 18-bit, 16-bit, 8-bit parallel modes as well as serial interfaces compatible with SPI, QSPI, MICROWIRE, and DSP hosts. Operation is specified from −40°C to +85°C in Pb-free 48-lead LQFP and LFCSP packages.
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| ADC resolution | 18bit |
| Throughput rate | 1.25MSPS |
| Complete cycle time | 800ns |
| Architecture | Charge redistribution SAR |
| Input configuration | Fully differential |
| Analog input voltage range | ±VREF |
| Maximum reference voltage | 2.5V |
| Integral nonlinearity | ±1.5 typical, ±3 maximumLSB |
| Differential nonlinearity | -1 to +1.25LSB |
| Dynamic range | 95 typicaldB |
| Signal-to-noise ratio | 93.5 typical at 20 kHz, VREF = 2.5 VdB |
| SINAD | 93.5 typical at 20 kHz, VREF = 2.5 VdB |
| Total harmonic distortion | -113 typical at 20 kHz, VREF = 2.5 VdB |
| Internal reference voltage | 2.048 typicalV |
| Internal reference temperature drift | ±8 typicalppm/°C |
| Supply voltage AVDD | 2.37 to 2.63V |
| Supply voltage DVDD | 2.37 to 2.63V |
| Interface supply voltage OVDD | 2.30 to 3.6V |
| Power dissipation with internal reference | 65 typical, 80 maximummW |
| Power-down dissipation | 2µW |
| Operating temperature range | -40 to +85°C |
| Pb-free | Only available in Pb-free packages |
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