The 18-bit charge redistribution SAR ADC converts fully differential analog inputs at up to 800 kSPS with no pipeline delay. It operates from a single 5 V analog and digital supply with a 2.7 V to 5.25 V output interface supply. The converter supports parallel 18-bit, 16-bit, or 8-bit bus operation and a serial interface compatible with SPI, QSPI, MICROWIRE, and DSP ports. Specified operation covers −40°C to +85°C in 48-lead LQFP and 48-lead LFCSP packages.
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| Resolution | 18bit |
| ADC architecture | SAR, charge redistribution |
| Input type | Fully differential |
| Differential input range | ±VREFV |
| Reference voltage range | 3 to AVDD + 0.1V |
| Maximum throughput, warp mode | 800kSPS |
| Maximum throughput, normal mode | 666kSPS |
| Maximum throughput, impulse mode | 570kSPS |
| Integral nonlinearity | ±2.5 maxLSB |
| Differential nonlinearity | -1 to +1.75LSB |
| No missing codes | 18bit |
| Dynamic range | 103 typ at VREF = 5 VdB |
| SINAD | 98 typ at 2 kHz, VREF = 4.096 VdB |
| Signal-to-noise ratio | 101 typ at 2 kHz, VREF = 5 VdB |
| Spurious-free dynamic range | 120 typ at 2 kHzdB |
| Total harmonic distortion | -115 typ at 2 kHzdB |
| Analog supply voltage | 4.75 to 5.25V |
| Digital interface supply voltage | 2.7 to DVDD + 0.3V |
| Power dissipation | 114 typ at 800 kSPS, PDBUF highmW |
| Operating temperature range | -40 to +85°C |
| RoHS | Compliant for Z-suffix orderable models |
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