| Image | Part Number | Manufacturer | Description |
|---|---|---|---|
![]() | IPTR-DSPBUILDER | Intel | DSP Builder Requires Both High-Level Algorithm And Hardware Language |
![]() | IP-AGX-PCIE/1 | Intel | PCI Express Compiler For The Hard IP Implementation |
![]() | IP-AGX-PCIE/4 | Intel | PCI Express Compiler For The Hard IP Implementation |
No Image | IPR-SDRAM/HPDDR2 | Intel | Embedded IP Core |
No Image | ETHER-FAST-O4-N3 | Lattice Semiconductor | 10/100 AND 1GIG ETHERNET, MEDIA ACCESS CONTROLLERS |
No Image | EF-DI-IMG-ENHANCE-SITE | Xilinx | Image Edge Enhancement LogiCORE IP |
No Image | DDR2-P-E3-U6 | Lattice Semiconductor | Development Software SDRAM DDR2 Pipelined Controll |
No Image | DMA-MC-E2-N3 | Lattice Semiconductor | MULTICHANNEL DMA CONTROLLER |
No Image | PCI-EXP1-E3-U3 | Lattice Semiconductor | Development Software PCI Express x1 Endpoint |
No Image | RSENC-DBLK-E2-U4 | Lattice Semiconductor | DYNAMIC BLOCK REED-SOLOMON ENCODER IP CORE |
No Image | DDRCT-GEN-E3-U6 | Lattice Semiconductor | DDR1 And DDR2 SDRAM Controller IP Cores |
No Image | EF-DI-POSL4MC-SITE | Xilinx | SPI-4 Phase 2 core |
No Image | ETHER-10G-PM-U4 | Lattice Semiconductor | 10GB+ Ethernet MAC IP core supports Lattice IP Hardware Evaluation Capability |
No Image | LPDDRCT-WB-M2-U | Lattice Semiconductor | LPDDR SDRAM Controller IP on MachXO2 |
No Image | VTERB-BLK-XM-U4 | Lattice Semiconductor | BLOCK VITERBI DECODER FOR DECODING DIFFERENT COMBINATIONS OF CONVOLUTIONALLY ENCODED SEQUENCES |
No Image | PCI-T64-E2-U6 | Lattice Semiconductor | 64 BIT PCI TARGET IDEAL FOR HIGH PERFORMANCE PCI APPLICATIONS |
No Image | VTERB-BLK-E3-U4 | Lattice Semiconductor | Development Software Block Viterbi Decoder |
No Image | NCO-DDS-E2-U2 | Lattice Semiconductor | Numerically Controlled Oscillator |
No Image | TR-SDI-PHY-E3-U1 | Lattice Semiconductor | Tri-Rate Serial Digital Interface Physical Layer IP Core |
No Image | REEDS-DECO-E2-N1 | Lattice Semiconductor | REED-SOLOMON DECODER USED TO PERFORM FORWARD ERROR CORRECTION |