GateMateA1-EVB Rev B FPGA Evaluation Board Design Document

Overview

This document provides the hardware design and schematics for the Olimex GateMateA1-EVB Revision B evaluation board. The design is centered on the Cologne Chip GateMate CCGM1A1 FPGA in a FBGA-324 package. The board incorporates a Raspberry Pi RP2040 for JTAG/SPI programming and a memory subsystem consisting of a Lyontek LY68S3200SLT SRAM and Zbit Semiconductor ZD25WQ16CSIGT Flash. Power management is handled by multiple Texas Instruments TPS62A02ADRLR step-down converters providing VDD_CORE and auxiliary voltages. The hardware includes access to North, South, and East I/O banks via pin headers, configuration DIP switches, and status LEDs for power, JTAG, and FPGA state.

Referenced Parts