NXP MPC8315E PowerQUICC II Pro Reference Manual
Reference manual for the NXP MPC8315E PowerQUICC II Pro processor family, detailing architecture, peripheral interfaces, memory mapping, and system initialization.
Overview
This reference manual provides technical details for the MPC8315E, MPC8315, MPC8314E, and MPC8314 PowerQUICC II Pro integrated host processors based on the e300 Power Architecture core. It covers the device's architectural components, including the security engine, DDR memory controller, and dual enhanced three-speed Ethernet controllers (eTSEC). The document provides extensive technical data on peripheral interfaces such as USB 2.0 (Dual-Role), PCI, SerDes PHY, and the enhanced local bus controller (eLBC). It also includes comprehensive sections on signal descriptions, internal memory-mapped registers, reset operations, and clocking configurations to assist in hardware design and software development.
Use Cases
- Media Server/NAS
- Low-End Voice Gateway
- 802.11n WLAN Access Point
- Integrated Host Processing
- Embedded Networking Systems
Topics
Referenced Parts
128-byte
MPS
(assuming a 128-byte MPS/MRRS), the bridge issues two read requests if a tag and a completion buffer
128-byte
MPS
Express write requests (assuming a 128-byte MPS).
0x0001
Maxim
Minimum (ICTT = 0x0001) Maximum (ICTT = 0xFFFF)
128-byte
Maxim
— 128-byte maximum payload size
128-byte
Maxim
• 128-byte maximum payload size (Max_Payload_Size) for memory read and write operations
| MPC8314 | Freescale | Supports MPC8315E MPC8315 MPC8314E MPC8314 |
| MPC8314E | Freescale | Supports MPC8315E MPC8315 MPC8314E MPC8314 |
| MPC8315 | Freescale | Supports MPC8315E MPC8315 MPC8314E MPC8314 |
| MPC8315E | Freescale | Supports MPC8315E MPC8315 MPC8314E MPC8314 |
| 128-byte | MPS | (assuming a 128-byte MPS/MRRS), the bridge issues two read requests if a tag and a completion buffer |
| 128-byte | MPS | Express write requests (assuming a 128-byte MPS). |
| 0x0001 | Maxim | Minimum (ICTT = 0x0001) Maximum (ICTT = 0xFFFF) |
| 128-byte | Maxim | — 128-byte maximum payload size |
| 128-byte | Maxim | • 128-byte maximum payload size (Max_Payload_Size) for memory read and write operations |